However, the I/O interface of NAND flash does not provide a random-access external address bus.
Rather, data must be read on a block-wise basis, with typical block sizes of hundreds to thousands of bits.
The two main types of flash memory are named after the NAND and NOR logic gates.
The individual flash memory cells exhibit internal characteristics similar to those of the corresponding gates.
Since boost converters are inherently more efficient than charge pumps, researchers developing low-power SSDs have proposed returning to the dual Vcc/Vpp supply voltages used on all the early flash chips, driving the high Vpp voltage for all flash chips in a SSD with a single shared external boost converter.
In spacecraft and other high-radiation environments, the on-chip charge pump is the first part of the flash chip to fail, although flash memories will continue to work – in read-only mode – at much higher radiation levels.
Flash memory is an electronic (solid-state) non-volatile computer storage medium that can be electrically erased and reprogrammed.
Toshiba developed flash memory from EEPROM (electrically erasable programmable read-only memory) in the early 1980s and introduced it to the market in 1984.
In NOR flash, each cell has one end connected directly to ground, and the other end connected directly to a bit line.
This arrangement is called "NOR flash" because it acts like a NOR gate: when one of the word lines (connected to the cell's CG) is brought high, the corresponding storage transistor acts to pull the output bit line low.
Once the FG is charged, the electrons in it screen (partially cancel) the electric field from the CG, thus, increasing the threshold voltage (V), and hence, a logical "1" is stored in the gate.